1. Field of the Invention
The present invention relates, in general, to nuclear event detectors (NEDs), and is particularly directed to a new and improved semiconductor architectecture for such a detector, wherein a sensitive PIN diode and operate-through integrated circuitry are combined onto a single chip using a silicon-on-insulator (SOI) process that is effective to place the signal processing circuitry portion of the NED chip in CMOS circuitry located in a thin silicon layer. The use of a thin-film device minimizes generation volume and hence maximizes hardness in the transient gamma environment. The PIN diode used for sensing the transient gamma radiation is built into the structure, which maximizes generation volume, and hence maximizes detector sensitivity.
2. Background Art
Nuclear event detectors (NEDs) may be employed in a variety of systems, such as military electronic systems, whose components are susceptible to damage from transient gamma radiation. An effective nuclear event detector must first detect the transient radiation generated by the nuclear event. At a pre-determined level of transient radiation, the NED is generally employed to generate appropriate signals to either circumvent or shut down critical circuitry that might otherwise be damaged or destroyed as a result of the transient radiation.
Several types of NEDs have been developed and are thus known in the art. The most common topologies used for detecting the transient gamma radiation associated with a nuclear event utilize PIN diodes to detect the rising gamma radiation. PIN diodes are well known in the electrical arts and are often used as radiation detectors and photo detectors. A PIN diode is generally a diode with a wide, lightly doped ‘near’ intrinsic semiconductor region between a p-type semiconductor and an n-type semiconductor regions. Such diodes experience a detectable change in current under bias as the level of gamma radiation rises. This change in current is then characterized with respect to the desired gamma radiation threshold, and electrical circuitry is employed to measure said current and provide a desired output signal for use by the protected system. The protected system may take such action as to power down sensitive circuitry, or some other action, when a nuclear event has been detected.
A commonly used approach to transient gamma survivability uses electrical circuitry consisting of discrete and integrated components. This approach uses a PIN diode as the primary radiation detector, along with discrete packaged components, such as transistors, integrated circuit amplifiers, transistors, and resistors, to implement the circuitry necessary to perform the detection and control functions. As proper timing of the system's response to the event is critical, this approach can be quite complex, slow in response, and difficult to repeat with great certainty as to signal timing due to component tolerances, thus limiting the capabilities of the NED to accurately detect and provide the desired response to the radiation produced by a nuclear event. Furthermore, as it is also desirable to use a plurality of nuclear event detectors distributed around the system to address non-uniformities in the transient gamma radiation caused by such phenomena as airframe shadowing, the variabilities in circuit path delay and component tolerances mentioned above pose a significant risk to NED performance and repeatability.
A second approach to the nuclear event detector problem uses a hybrid or multichip module assembly. This results in a more compact solution, but the multichip assembly is complex, labor intensive to produce, and expensive. Such hybrid or multichip NEDs are generally housed within a metal or ceramic housing containing a ceramic substrate upon which the above mentioned electrical components are placed, with electrically conductive paths connecting said components contained within or upon the substrate itself. Such a hybrid may typically contain a radiation-sensing element such as a PIN diode and a signal processing and timing chip. One example of a hybrid microcircuit approach to packaging an NED is the Matra BAe Dynamics (UK) NMC6419 product, which is offered in a Dual In Line package.
A more desirable approach would be to integrate the electronics associated with the event detection and circumvention control functions on one single integrated circuit contained on a single semiconductor chip, preferably using a high-performance analog process. As used herein, the term “semiconductor chip” means the multilayer semiconductor structure prior to encapsulation or packaging. This would enable moving nuclear event detection from an exotic application such as a discrete component NED, or a complex multichip module NED, to a much simpler single chip.
However, in order to be successful, such an integrated single semiconductor chip NED must meet two conflicting requirements. The chip design must provide a circuit element that is highly sensitive to transient gamma radiation (such as the PIN diode used as a detector in the multichip module approach) while simultaneously providing analog and digital functions (the “signal processing circuitry”) that are insensitive to transient gamma radiation.
With regard to said signal processing circuitry, it has been shown and is well known in the art that the use of thin-film SOI processing will provide “operate-through” capability (meaning that the circuitry continues to operate) at high transient gamma levels due to its very small generation volume. However, implementing the desired PIN diode detector in a thin SOI layer (i.e. creating a “monolithic detector”) is historically problematic due to the extremely small generation volume which is inherent in the SOI process: a higher generation volume is required in order for the PIN diode to operate effectively as a detector. Thus, such a monolithic detector would not likely provide a sufficiently strong signal at the transient gamma levels of interest to function as an NED. Unfortunately, the thin film layer of silicon inherent in the SOI process is simply too thin to produce an efficient PIN diode for NED purposes.